Andy Turner, EPCC
20 December 2017
a.turner@epcc.ed.ac.uk
2017 so far
Initial results
System | Processor | Memory | Interconnect |
---|---|---|---|
ARCHER | 12-core Xeon v2, 2.7 GHz | 4 channel DDR3 | Cray Aries |
Cirrus@EPCC | 18-core Xeon v4, 2.1 GHz | 4 channel DDR4 | FDR Hypercube |
Thomas@MMMHub | 12-core Xeon v4, 2.1 GHz | 4 channel DDR4 | OPA |
Athena@HPC-Mid+ | 14-core Xeon v4, 2.4 GHz | 4 channel DDR4 | EDR |
CSD3@Cambridge | 16-core Xeon Skylake, 2.6 GHz | 6 channel DDR4 | OPA |